About machine langugae

euser1984

To quote a wikipedia sentence on machine language

the machine code 00000101, which causes the CPU to decrement the B processor register, would be represented in assembly language as DEC B

Considering that the above byte does this job, where does that byte appear out of - ie. what process says "ok, I'll leave all these transistors off and these two on because it will do this...."

And how does the cpu get to the stage from these transistors being turned on to decrementing the register?

Thanks.

Tom Dunne

If you think of the transistors at a slightly higher level, they are combined to form logic gates (e.g. AND, OR, XOR, etc.). Additionally, they can be combined to form addressable storage units for binary data.

Using logic gates, a CPU can perform basic logic and store resultant output in registers and ultimately, these storage units (e.g. RAM). It's the combination of this logic, at extremely high speeds, that gives the CPU it's utility.

The likes of 00000101 is assigned a meaning by the architecture designers, what is Decrement B register on one architecture could be something else on another architecture. In fact, a different architecture may not even have a B register. Hence why assembly language for, say, the ARM architecture, will not run on x86.

Hardwired onto a CPU is an instruction to start at a given memory address, execute the instructions and go onto the next instruction until told otherwise.

bpmurray

The problem is that it's difficult to map a binary value onto any one particular processor - they're all very different. A few of the most common CPU architectures (and this is very simplified) are the Intel X86, ARM and Cell. Each of these will have a different interpretation for 00000101: for X86 it's DEC B, but for Cell, it might be shlqbybi rt, ra, rb. Ultimately, all of these map down to individual transistors (actually large sets of transistors), but very few know exactly how this mapping works.

There's a nice intro to this stuff here.

DublinDilbert

There's all sorts of tricks used when designing the CPU architecture, to make it as efficient as possible.

I was looking some assembly code for an AVR processor which was generated by GCC recently, there isn't an increment instruction, instead they use the subtract literal instruction, and the literal value they feed in is -1, so the effect is x++ gets executed as x = x - (-1).

On a RISC processor it will be implemented directly using transistors/logic gates at the correct part of the cycle. On a CISC processor (x86 etc), it will be implemented over a few cycles using micro-code.

A binary decrementer would look like this:-
http://letslearncomputing.blogspot.ie/2013/03/digital-logic-4-bit-binary-decrementer.html

euser1984

So, is it fair to say that when a manufacturer talks about having x amount of transistors it's meaningless?

Given that basic operators would only require a few steps is there always a path back to the memory straight away?

I read those two web pages - very interesting...thanks.

rock22

This is a link to a copy of HP Journal from 1983. http://www.hpl.hp.com/hpjournal/pdfs/IssuePDFs/1983-06.pdf

It explains the design of a fairly simple computer. Might be worth reading

euser1984

Is it a case that the only thing processors really do is simple logic gate operations in the ALU? Is it the case then that underlying any program is just these types of operations that are done including output and input from other devices?

Is it a case then that the only difficulty with programming is figuring out how to use interfaces to libraries etc.?

Thanks.

democrates

euser1984 wrote: »

So, is it fair to say that when a manufacturer talks about having x amount of transistors it's meaningless?

Not quite, at the pedantic level it means how many transistors are on that cpu :pac:

Transistor count is not a clear cut performance indicator. Obviously a Xeon cpu has far more transistors than an 8086, and is factors more powerful. Some Intel CPU's have extra instructions for handling xml for example, but if you don't need that then the extra transistors won't give you any advantage.

The workload, code, and technology surrounding the cpu will filter a set of cpu's, then watts and euro are selection factors along with support and availability. For datacentre racks it may come down to Intel vs AMD, another set of cpus for a mobile feature phone, another for an embedded alarm system. It all depends, one selection process does not fit all.

Finally, there's no reason for manufacturers to keep secret the transistor count, it's testament to what is after all, a marvellous feat of engineering. We're really spoiled for choice today, and there's much more to come.

euser1984 wrote: »

Given that basic operators would only require a few steps is there always a path back to the memory straight away?

Yes, regardless of operation complexity, as already pointed out the result is stored in a register, and from there it's a simple mov command to put the contents of that register into a specified ram address.

bpmurray

democrates wrote: »

from there it's a simple mov command to put the contents of that register into a specified ram address.

Well, that depends on the CPU - on some architectures you have to load the target RAM address into another register and then move the data from one register to the address in the other register, so it's a 2-instruction LD and MOV.